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DSP IPs for radar, lidar and communication processing applications

The DSP IP cores continue to provide more flexible compute options while allowing system-on-chip (SoC) designers to tailor the instruction set, add data types, and implement tightly-integrated interfaces between the DSP and external logic. These IPs are also supported by a comprehensive set of complex math library functions.

Take the case of two new DSP cores that Cadence Design Systems has added to its Tensilica ConnX family of DSP cores for radar, lidar, and communication processing. The new DSP IP cores—ConnX 110 and ConnX 120—share a common instruction set architecture (ISA) with their predecessors, ConnX B10 and B20 DSPs.

Source: Cadence Design Systems

The applications like automotive radars that support multiple data types—fixed and float, real and complex—demand high-performance DSPs to cater to multiple antennas and sensors. Higher data rates, lower latency, and a larger dynamic range are key requirements for such applications.

Using multiple sensors also leads to sensor fusion, which requires heavy floating-point and linear algebra calculations. The 3D capture use cases require heavy floating-point and linear algebra calculations as well. Cadence has featured 128-bit single instruction multiple data (SIMD) for ConnX 110 and 256-bit SIMD for ConnX 120, respectively, for complex math operations.

The company also claims that these DSP cores have been optimized for a small memory footprint and low-power signal processing. Moreover, they are fully compatible with the ConnX B10 and B20 DSPs, thus preserving software compatibility for easy migration. Additionally, all DSPs are C programmable, so design engineers don’t need assembly language.

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